![]() Both the effects directly hinder the multiplier speed by degrading transistor speed, if this problem occurs for long time then the system may fail due to timing violations. Similarly, +ve bias temperature instability, occurs when an nMOS transistor is under positive bias. Furthermore, the negative bias temperature instability effect occurs when a pMOS transistor is under –ve bias (Vgs = −Vdd), increasing the Vt (threshold voltage) of the pMOS transistor, and declinement in multiplier speed. Many researchers are working to design multipliers which offer either of the following design targets – high speed, low power consumption and less area. The advancement in digital signal processing with its various other applications made digital multipliers to play major role in technology.
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